PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK 1927 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK                                                          0x00040000L
PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK 1785 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK                                                          0x00040000L
PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK 1782 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_UTCL1_CNTL2__ENABLE_PERF_EVENT_RD_WR_MASK                                                          0x00040000L