PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 22117 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK                                                                   0x7FFF0000L
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 14777 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK                                                                   0x7FFF0000L
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 16106 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK                                                                   0x7FFF0000L
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 15968 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK                                                                   0x7FFF0000L
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 6710 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 0x7fff0000L
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 6437 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 0x7fff0000
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 7225 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 0x7fff0000
PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 7761 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_SC_VPORT_SCISSOR_4_BR__BR_Y_MASK 0x7fff0000