PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 7514 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT                                                   0xa
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 1950 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT                                                   0xa
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 1808 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT                                                   0xa
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 1805 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT                                                   0xa
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 6379 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0x0000000c
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 6570 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 7358 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc
PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 7894 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_SC_ENHANCE__DISABLE_SC_PROCESS_RESET_TILE__SHIFT 0xc