PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 1649 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK                                                                0x00000020L
PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 1480 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK                                                                0x00000020L
PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 5620 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x00000020L
PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 5675 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20
PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 6463 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20
PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 6997 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20