PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT 7138 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT                                                            0x2
PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT 1624 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT                                                            0x2
PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT 1487 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT                                                            0x2
PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT 1450 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_CNTL_STATUS__UTC_PRT_DETECTED__SHIFT                                                            0x2