PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 24260 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT                                                                     0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 16870 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT                                                                     0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 18201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT                                                                     0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 18076 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT                                                                     0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 5589 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 0x00000003
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 5572 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 6360 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 0x3
PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 6894 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_3__SHIFT 0x3