PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 24259 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT                                                                     0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 16869 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT                                                                     0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 18200 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT                                                                     0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 18075 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT                                                                     0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 5587 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 0x00000002
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 5570 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 6358 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 0x2
PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 6892 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_ENA_2__SHIFT 0x2