PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 24266 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT                                                             0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 16876 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT                                                             0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 18207 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT                                                             0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 18082 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT                                                             0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 5581 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 0x00000011
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 5584 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 6372 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 0x11
PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 6906 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define PA_CL_CLIP_CNTL__UCP_CULL_ONLY_ENA__SHIFT 0x11