NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT 4342 drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h #define NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT                                                              0x1a
NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT 19355 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT                                                              0x1a
NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT 21878 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT                                                              0x1a
NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT 35771 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT                                                              0x1a
NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT 25059 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define NBIF_VWIRE_CTRL__SDP_VWR_BLOCKLVL__SHIFT                                                              0x1a