MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 9962 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10
MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 9656 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10
MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 10934 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10
MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 7786 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x00000010
MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 10264 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10