MPLL_SEQ_UCODE_1__INSTR7__SHIFT 11485 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR7__SHIFT 0x0000001c
MPLL_SEQ_UCODE_1__INSTR7__SHIFT 9418 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR7__SHIFT 0x1c
MPLL_SEQ_UCODE_1__INSTR7__SHIFT 10330 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR7__SHIFT 0x1c