MPLL_SEQ_UCODE_1__INSTR6__SHIFT 11483 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR6__SHIFT 0x00000018
MPLL_SEQ_UCODE_1__INSTR6__SHIFT 9416 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR6__SHIFT 0x18
MPLL_SEQ_UCODE_1__INSTR6__SHIFT 10328 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR6__SHIFT 0x18