MPLL_SEQ_UCODE_1__INSTR3__SHIFT 11477 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR3__SHIFT 0x0000000c
MPLL_SEQ_UCODE_1__INSTR3__SHIFT 9410 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR3__SHIFT 0xc
MPLL_SEQ_UCODE_1__INSTR3__SHIFT 10322 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR3__SHIFT 0xc