MPLL_SEQ_UCODE_1__INSTR1__SHIFT 11473 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR1__SHIFT 0x00000004
MPLL_SEQ_UCODE_1__INSTR1__SHIFT 9406 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR1__SHIFT 0x4
MPLL_SEQ_UCODE_1__INSTR1__SHIFT 10318 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR1__SHIFT 0x4