MPLL_SEQ_UCODE_1__INSTR0__SHIFT 11471 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR0__SHIFT 0x00000000
MPLL_SEQ_UCODE_1__INSTR0__SHIFT 9404 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR0__SHIFT 0x0
MPLL_SEQ_UCODE_1__INSTR0__SHIFT 10316 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_SEQ_UCODE_1__INSTR0__SHIFT 0x0