MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 11418 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 0x00000010L
MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 9531 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 0x10
MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 10445 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_DQ_FUNC_CNTL__YCLK_SEL_MASK 0x10