MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 11345 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 0x0000001d
MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 9588 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 0x1d
MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 10502 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_CONTROL__DQ_1_1_PLL_PWRON__SHIFT 0x1d