MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 11331 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 0x00000014
MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 9570 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 0x14
MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 10484 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_CONTROL__DQ_0_1_BG_PWRON__SHIFT 0x14