MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 11301 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 0x0000000b
MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 9440 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 0xb
MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 10354 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_CNTL_MODE__MPLL_MCLK_SEL__SHIFT 0xb