MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 11297 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 0x00000010
MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 9448 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 0x10
MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 10362 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MPLL_CNTL_MODE__MPLL_CHG_STATUS__SHIFT 0x10