MPCC5_MPCC_TOP_SEL__MPCC_TOP_SEL__SHIFT 23720 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC5_MPCC_TOP_SEL__MPCC_TOP_SEL__SHIFT                                                               0x0
MPCC5_MPCC_TOP_SEL__MPCC_TOP_SEL__SHIFT 20652 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC5_MPCC_TOP_SEL__MPCC_TOP_SEL__SHIFT                                                               0x0