MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 19113 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0
MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 23534 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0
MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 20466 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC3_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0