MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 19010 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0
MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 23438 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0
MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT 20370 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC2_MPCC_OPP_ID__MPCC_OPP_ID__SHIFT                                                                 0x0