MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT 18884 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT                                                      0x1f
MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT 23325 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT                                                      0x1f
MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT 20257 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC0_MPCC_STATUS__DPP_MPCC_EXCEPTION_ACK__SHIFT                                                      0x1f