MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT 18866 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT                                                   0xc
MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT 23314 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT                                                   0xc
MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT 20246 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC0_MPCC_STALL_STATUS__MPCC_STALL_INT_MASK__SHIFT                                                   0xc