MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK 18856 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK                                                                 0x00000FFFL
MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK 23296 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK                                                                 0x00000FFFL
MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK 20228 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MPCC0_MPCC_BG_R_CR__MPCC_BG_R_CR_MASK                                                                 0x00000FFFL