MP1_SMN_C2PMSG_64__CONTENT__SHIFT  357 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT                                                                     0x0
MP1_SMN_C2PMSG_64__CONTENT__SHIFT  792 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_sh_mask.h #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT                                                                     0x0
MP1_SMN_C2PMSG_64__CONTENT__SHIFT  352 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_sh_mask.h #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT                                                                     0x0
MP1_SMN_C2PMSG_64__CONTENT__SHIFT  377 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT	0x0