MP1_SMN_C2PMSG_102__CONTENT__SHIFT  471 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT                                                                    0x0
MP1_SMN_C2PMSG_102__CONTENT__SHIFT  906 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_sh_mask.h #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT                                                                    0x0
MP1_SMN_C2PMSG_102__CONTENT__SHIFT  466 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_sh_mask.h #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT                                                                    0x0
MP1_SMN_C2PMSG_102__CONTENT__SHIFT  491 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT	0x0