MP1_IH_SW_INT__ID__SHIFT  872 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP1_IH_SW_INT__ID__SHIFT                                                                              0x0
MP1_IH_SW_INT__ID__SHIFT  653 drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_sh_mask.h #define MP1_IH_SW_INT__ID__SHIFT                                                                              0x0
MP1_IH_SW_INT__ID__SHIFT  852 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_sh_mask.h #define MP1_IH_SW_INT__ID__SHIFT                                                                              0x0
MP1_IH_SW_INT__ID__SHIFT 1422 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP1_IH_SW_INT__ID__SHIFT	0x0