MP1_BASE__INST3_SEG1  716 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST3_SEG1                       0
MP1_BASE__INST3_SEG1  541 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST3_SEG1                       0
MP1_BASE__INST3_SEG1  718 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST3_SEG1                       0
MP1_BASE__INST3_SEG1  718 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST3_SEG1                       0
MP1_BASE__INST3_SEG1  963 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST3_SEG1                       0
MP1_BASE__INST3_SEG1  384 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST3_SEG1                      0
MP1_BASE__INST3_SEG1  568 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST3_SEG1                       0