MP1_BASE__INST3_SEG0  715 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST3_SEG0                       0
MP1_BASE__INST3_SEG0  540 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST3_SEG0                       0
MP1_BASE__INST3_SEG0  717 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST3_SEG0                       0
MP1_BASE__INST3_SEG0  717 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST3_SEG0                       0
MP1_BASE__INST3_SEG0  962 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST3_SEG0                       0
MP1_BASE__INST3_SEG0  383 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST3_SEG0                      0
MP1_BASE__INST3_SEG0  567 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST3_SEG0                       0