MP1_BASE__INST2_SEG4  712 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST2_SEG4                       0
MP1_BASE__INST2_SEG4  537 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST2_SEG4                       0
MP1_BASE__INST2_SEG4  715 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST2_SEG4                       0
MP1_BASE__INST2_SEG4  715 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST2_SEG4                       0
MP1_BASE__INST2_SEG4  960 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST2_SEG4                       0
MP1_BASE__INST2_SEG4  381 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST2_SEG4                      0
MP1_BASE__INST2_SEG4  564 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST2_SEG4                       0