MP1_BASE__INST2_SEG2  710 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST2_SEG2                       0
MP1_BASE__INST2_SEG2  535 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST2_SEG2                       0
MP1_BASE__INST2_SEG2  713 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST2_SEG2                       0
MP1_BASE__INST2_SEG2  713 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST2_SEG2                       0
MP1_BASE__INST2_SEG2  958 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST2_SEG2                       0
MP1_BASE__INST2_SEG2  379 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST2_SEG2                      0
MP1_BASE__INST2_SEG2  562 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST2_SEG2                       0