MP1_BASE__INST2_SEG1  709 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST2_SEG1                       0
MP1_BASE__INST2_SEG1  534 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST2_SEG1                       0
MP1_BASE__INST2_SEG1  712 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST2_SEG1                       0
MP1_BASE__INST2_SEG1  712 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST2_SEG1                       0
MP1_BASE__INST2_SEG1  957 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST2_SEG1                       0
MP1_BASE__INST2_SEG1  378 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST2_SEG1                      0
MP1_BASE__INST2_SEG1  561 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST2_SEG1                       0