MP1_BASE__INST1_SEG2  703 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST1_SEG2                       0
MP1_BASE__INST1_SEG2  528 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST1_SEG2                       0
MP1_BASE__INST1_SEG2  707 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST1_SEG2                       0
MP1_BASE__INST1_SEG2  707 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST1_SEG2                       0
MP1_BASE__INST1_SEG2  952 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST1_SEG2                       0
MP1_BASE__INST1_SEG2  373 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST1_SEG2                      0
MP1_BASE__INST1_SEG2  555 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST1_SEG2                       0