MP1_BASE__INST1_SEG1  702 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST1_SEG1                       0
MP1_BASE__INST1_SEG1  527 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST1_SEG1                       0
MP1_BASE__INST1_SEG1  706 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST1_SEG1                       0
MP1_BASE__INST1_SEG1  706 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST1_SEG1                       0
MP1_BASE__INST1_SEG1  951 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST1_SEG1                       0
MP1_BASE__INST1_SEG1  372 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST1_SEG1                      0
MP1_BASE__INST1_SEG1  554 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST1_SEG1                       0