MP1_BASE__INST1_SEG0  701 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST1_SEG0                       0
MP1_BASE__INST1_SEG0  526 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST1_SEG0                       0
MP1_BASE__INST1_SEG0  705 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST1_SEG0                       0
MP1_BASE__INST1_SEG0  705 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST1_SEG0                       0
MP1_BASE__INST1_SEG0  950 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST1_SEG0                       0
MP1_BASE__INST1_SEG0  371 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST1_SEG0                      0
MP1_BASE__INST1_SEG0  553 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST1_SEG0                       0