MP1_BASE__INST0_SEG5  699 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST0_SEG5                       0x00F00000
MP1_BASE__INST0_SEG5  524 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST0_SEG5                       0
MP1_BASE__INST0_SEG5  551 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST0_SEG5                       0