MP1_BASE__INST0_SEG4  698 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST0_SEG4                       0x00EC0000
MP1_BASE__INST0_SEG4  523 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST0_SEG4                       0
MP1_BASE__INST0_SEG4  703 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST0_SEG4                       0x02400400
MP1_BASE__INST0_SEG4  703 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST0_SEG4                       0x0243FC00
MP1_BASE__INST0_SEG4  948 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST0_SEG4                       0x00F00000
MP1_BASE__INST0_SEG4  369 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST0_SEG4                      0
MP1_BASE__INST0_SEG4  550 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST0_SEG4                       0