MP1_BASE__INST0_SEG2  696 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST0_SEG2                       0x00400400
MP1_BASE__INST0_SEG2  521 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST0_SEG2                       0
MP1_BASE__INST0_SEG2  701 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST0_SEG2                       0x00EC0000
MP1_BASE__INST0_SEG2  701 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST0_SEG2                       0x00E00000
MP1_BASE__INST0_SEG2  946 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST0_SEG2                       0x00E80000
MP1_BASE__INST0_SEG2  367 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST0_SEG2                      0
MP1_BASE__INST0_SEG2  548 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST0_SEG2                       0