MP1_BASE__INST0_SEG1 695 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP1_BASE__INST0_SEG1 0x00016200 MP1_BASE__INST0_SEG1 520 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP1_BASE__INST0_SEG1 0 MP1_BASE__INST0_SEG1 700 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP1_BASE__INST0_SEG1 0x00E80000 MP1_BASE__INST0_SEG1 700 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP1_BASE__INST0_SEG1 0x00DC0000 MP1_BASE__INST0_SEG1 945 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP1_BASE__INST0_SEG1 0x02400400 MP1_BASE__INST0_SEG1 366 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP1_BASE__INST0_SEG1 0 MP1_BASE__INST0_SEG1 547 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP1_BASE__INST0_SEG1 0