MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT  253 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT                                                           0x0
MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT  258 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP0_SMN_IH_SW_INT_CTRL__SW_TRIG_MASK__SHIFT	0x0