MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK  256 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK                                                               0x00000100L
MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK  261 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP0_SMN_IH_SW_INT_CTRL__SW_INT_ACK_MASK	0x00000100L