MP0_IH_SW_INT__ID__SHIFT  508 drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_sh_mask.h #define MP0_IH_SW_INT__ID__SHIFT                                                                              0x0
MP0_IH_SW_INT__ID__SHIFT  493 drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_sh_mask.h #define MP0_IH_SW_INT__ID__SHIFT                                                                              0x0
MP0_IH_SW_INT__ID__SHIFT  972 drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_sh_mask.h #define MP0_IH_SW_INT__ID__SHIFT	0x0