MP0_BASE__INST3_SEG1  660 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP0_BASE__INST3_SEG1                       0
MP0_BASE__INST3_SEG1  499 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP0_BASE__INST3_SEG1                       0
MP0_BASE__INST3_SEG1  676 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP0_BASE__INST3_SEG1                       0
MP0_BASE__INST3_SEG1  676 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP0_BASE__INST3_SEG1                       0
MP0_BASE__INST3_SEG1  921 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP0_BASE__INST3_SEG1                       0
MP0_BASE__INST3_SEG1  354 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP0_BASE__INST3_SEG1                      0
MP0_BASE__INST3_SEG1  526 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP0_BASE__INST3_SEG1                       0