MP0_BASE__INST1_SEG1  646 drivers/gpu/drm/amd/include/arct_ip_offset.h #define MP0_BASE__INST1_SEG1                       0
MP0_BASE__INST1_SEG1  485 drivers/gpu/drm/amd/include/navi10_ip_offset.h #define MP0_BASE__INST1_SEG1                       0
MP0_BASE__INST1_SEG1  664 drivers/gpu/drm/amd/include/navi12_ip_offset.h #define MP0_BASE__INST1_SEG1                       0
MP0_BASE__INST1_SEG1  664 drivers/gpu/drm/amd/include/navi14_ip_offset.h #define MP0_BASE__INST1_SEG1                       0
MP0_BASE__INST1_SEG1  909 drivers/gpu/drm/amd/include/renoir_ip_offset.h #define MP0_BASE__INST1_SEG1                       0
MP0_BASE__INST1_SEG1  342 drivers/gpu/drm/amd/include/vega10_ip_offset.h #define MP0_BASE__INST1_SEG1                      0
MP0_BASE__INST1_SEG1  512 drivers/gpu/drm/amd/include/vega20_ip_offset.h #define MP0_BASE__INST1_SEG1                       0