MMSCH_GPUIOV_CMD_STATUS_IP_1__CMD_STATUS_MASK  332 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define MMSCH_GPUIOV_CMD_STATUS_IP_1__CMD_STATUS_MASK                                                         0x0000000FL
MMSCH_GPUIOV_CMD_STATUS_IP_1__CMD_STATUS_MASK  332 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define MMSCH_GPUIOV_CMD_STATUS_IP_1__CMD_STATUS_MASK                                                         0x0000000FL