MMSCH_GPUIOV_CMD_CONTROL_1__VM_BUSY_INTR_EN_MASK  234 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define MMSCH_GPUIOV_CMD_CONTROL_1__VM_BUSY_INTR_EN_MASK                                                      0x00000040L
MMSCH_GPUIOV_CMD_CONTROL_1__VM_BUSY_INTR_EN_MASK  234 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define MMSCH_GPUIOV_CMD_CONTROL_1__VM_BUSY_INTR_EN_MASK                                                      0x00000040L