BASE_INNER 47 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg BASE_INNER 124 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c #define BASE_INNER(seg) \ BASE_INNER 30 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dwb.h #define BASE_INNER(seg) \ BASE_INNER 163 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c #define BASE_INNER(seg) \ BASE_INNER 31 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h #define BASE_INNER(seg) \ BASE_INNER 33 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mmhubbub.h #define BASE_INNER(seg) \ BASE_INNER 418 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c #undef BASE_INNER BASE_INNER 419 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg BASE_INNER 31 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h #define BASE_INNER(seg) \ BASE_INNER 281 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c #undef BASE_INNER BASE_INNER 282 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg BASE_INNER 53 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c #define BASE_INNER(seg) \ BASE_INNER 44 drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c #define BASE_INNER(seg) \ BASE_INNER 50 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c #define BASE_INNER(seg) \ BASE_INNER 44 drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c #define BASE_INNER(seg) \ BASE_INNER 53 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #undef BASE_INNER BASE_INNER 54 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg BASE_INNER 50 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c #undef BASE_INNER BASE_INNER 51 drivers/gpu/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg BASE_INNER 51 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #undef BASE_INNER BASE_INNER 52 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg BASE_INNER 50 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c #undef BASE_INNER BASE_INNER 51 drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg BASE_INNER 94 drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c #define BASE_INNER(seg) \ BASE_INNER 175 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c #define BASE_INNER(seg) \ BASE_INNER 175 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c #undef BASE_INNER BASE_INNER 176 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg BASE_INNER 171 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c #undef BASE_INNER BASE_INNER 172 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg