MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 7000 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h #define MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT                                                           0x10
MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 6452 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h #define MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT                                                           0x10
MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 7048 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h #define MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT                                                           0x10
MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT  173 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_sh_mask.h #define MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT                                                           0x10
MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 14169 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h #define MMEA1_EDC_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT                                                           0x10